IO Bench Charaterization
Posting Date : 12 Nov 2018 | Close Date :10 Feb 2019

Takes full responsibility of validating any characterization or customer application issue with minimal guidance.

Takes responsibility for isolating the issue to a specific area such as test gap, SW bug, silicon bug, or process deviation.

Collaborates and works with necessary counter parts in Design, Test, or Applications to resolve any product performance related issue.

 Demonstrates an ability to analyze and present data in a clear and convincing way to highlight if an issue is present or resolved.

 Maintains a good understanding of how characterization measurement impacts FPGA speeds file and work with counter-parts in making speeds file adjustments.


Performance and Yield Analysis

  Ability to analyze FPGA block and feature performance independently. Take ownership of related datasheet parameter validation. 

    Takes full responsibility of generating all the analysis plots for supporting the validation of certain FPGA feature performance.

   Builds basic statistical analysis skills and generate trends for the analysis of device feature performance over process windows.

  Takes full ownership of providing necessary guard band in both wafer sort and Final test to achieve the objective of shipping the highest quality products.

  Maintains a good understanding of the strengths and short comings for different platforms and methodologies so the appropriate trade-offs can be recommended if necessary

  Takes full block level responsibilities for generating the characterization, datasheet, and customer qualification reports.




               • Bachelor/Master Degree in Electrical/Electronic Engineering, 3 or more years of experience

               • Experience using automation tools, e.g. LabView

               • Experience on IO characterization (Analog and Mixed Signal), and knowledge on various IOs standards (LPDDR, DDR, LVDS, MIPI, LVCMOS)

               • Bench equipment knowledge, e.g. signal generator, oscilloscope

               • RTL knowledge for content creation & debug, including logic and state machine implementation, and Vivado SW knowledge is a plus

               • Unix proficiency and Perl or other scripting language is a plus

               • ATE test program knowledge, preferably Advantest is a plus

               • Strong data analysis skill as well as proficiency on data analysis tool e.g. JMP, Microsoft tools

               • Strong communication skills including data presentation


Specialization : Administration/Operations
Type of Employment : Permanent
Minimum Experience : Fresher
Work Location : Singapore

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