Verification Engineer - DRAM Engineering
Posting Date : 08 May 2019 | Close Date :06 Aug 2019

Job Responsibilities:
1. Using advanced verification languages (HVL) and techniques to build a cutting-edge verification platform to fully evaluate memory designs at chip or block level on functionality
2. Participating in creating full chip behavior model that is distributed to Micron’s world-wide external customer’s months before silicon is available
3. Building a verification plan, incorporating directed and random patterns that cover all features
4. Understanding the functionality and timing requirements of the design
5. Understand internal and external datasheets
6. Co-work with international colleagues on developing new verification flows to take on the challenges in emerging memory design
Job Requirements:
1. 2+ years of experience in Verification
2. Solid understanding of Verilog, System Verilog and object-oriented programming
3. Experience in VIP development using UVM (or equivalent) is a must
4. Good debugging and problem-solving skills are a must
5. Experience defining coverage strategy and writing coverage model is a must
6. Experience in simulator tools like Synopsys, Cadence, Mentor Graphics is preferred
7. Experience in scripting language like Shell, Perl, Python is preferred
8. Must possess good communication skills to convey complex technical concepts and ability to work well in a team
9. Previous work experience in memory is a plus



Bachelors 2+ or Post Graduate Degree 2+ in Electronics Engineering or related engineering field


Specialization : Electronics/Semiconductor
Type of Employment : Permanent
Minimum Experience : 2 Years
Work Location : India

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